Curriculum Vitae

M.S. IN SOFTWARE ENGINEERING

B.S. IN COMPUTER SCIENCE

RESEARCH ASSISTANT

Built a C and Python side-channel data pipeline combining NVML GPU telemetry and Flush+Reload cache timing with an alignment algorithm to extract structured inference-phase signals as PyTorch tensors. Trained a dual-branch 1D CNN with late fusion to classify model architecture and quantization state from multi-modal traces, achieving 99.0% accuracy across 10 open-weight models.

TEACHING ASSISTANT

Supported students in Computer Organization (CSC 252) by leading office hour sessions on topics like buffer overflows and cache simulation, providing detailed technical feedback, and co-authoring exam questions.

RESEARCH ASSISTANT

Led NoC deadlock avoidance research for 2.5D/3D chiplet architectures, evaluating routing algorithms through cycle-accurate simulations, analyzing papers, and quantifying latency-area tradeoffs. Reverse-engineered NoC topologies from AMD MI300, Intel Ponte Vecchio, and TSMC CoWoS, identifying vendor deadlock prevention strategies and authoring a technical survey presented to researchers.

SOFTWARE ENGINEERING INTERN

Architected and implemented RESTful microservices using Java Spring Boot serving enterprise clients with a scalable backend. Optimized MySQL database schemas with strategic indexing and normalization, reducing query response times by 40%. Integrated distributed services using Spring Cloud with service discovery and API gateway patterns.

HIGH HONOR IN RESEARCH

Awarded for undergraduate thesis research in non-intrusive GPU telemetry and cache side-channel workload characterization.

CS DISCOVER GRANT

Selected for faculty-mentored undergraduate summer research in computer science.

Poster Title

Last, F. (2199). "Poster Title." Conference Name, City, Country.